The present invention relates to the field of electronic circuits, and, more particularly, to operational amplifiers.
Two-stage operational amplifiers typically include a first gain stage connected to inputs of the amplifier and a second gain stage driven by the first gain stage. The second gain stage provides the output of the amplifier. Both the first gain stage and the second gain stage are operated at respective bias currents. In metal oxide semiconductor (MOS) amplifiers, the first gain stage is typically operated at bias currents which are comparable in magnitude to the bias currents of the second gain stage so that maximum gain and bandwidth may be achieved.
Different capacitances may be present at the control input and the output of the second gain stage causing respective input and output poles. A well known method for addressing this problem is to connect a so-called Miller capacitor between the control input and the output of the second gain stage to xe2x80x9csplitxe2x80x9d these poles. A drawback of this approach is that at high frequency currents the Miller capacitor acts as a short circuit between the control input and the output of the second gain stage, which causes a feedthrough effect.
While the feedthrough effect may be problematic in any two-stage amplifier, it is particularly so in MOS amplifiers. The reason is that a transconductance of the second gain stage varies as the square root of the bias current rather than directly with the bias current, which is the case with a bipolar amplifier. The feedthrough effect may therefore result in the occurrence of a right-half plane (RHP) zero in the complex transfer function of the amplifier. This, in turn, may severely degrade the phase margin of the amplifier.
Several prior art attempts have been made to reduce the feedthrough effect caused by a Miller capacitor. One such approach is to insert a nulling resistor in series between the first gain stage and the Miller capacitor. If the nulling resistor is made equal in value to the inverse of the transconductance of the second gain stage, the alternating current (AC) flowing through the nulling resistor will cancel the RHP zero as a result of the elimination of the feedthrough effect for a particular transconductance. Of course, the transconductance of the second gain stage is quite often not a constant. Thus, the nulling resistor does not xe2x80x9ctrackxe2x80x9d the transconductance of the second gain stage well. In other words, the nulling resistor approach may only be relied upon to provide adequate compensation at one particular bias current, temperature, and set of process variations of the integrated circuit.
Yet another common prior art approach is the so-called xe2x80x9csource-followerxe2x80x9d approach in which the Miller capacitor is connected between the first gain stage and a first conduction terminal of a transistor. The other conduction terminal of the transistor is connected to a reference voltage, and the conduction terminal of the transistor is connected to the output of the second gain stage. Thus, the source-follower transistor drives the compensation capacitor based upon the output of the second gain stage. Here again, this approach may still provide poor tracking of the transconductance of the second gain stage over a wide dynamic range. It may even be worse than a nulling resistor in certain applications. In particular, this approach is disadvantageous in that it is unidirectional. The signal flow is from the output of the second gain stage through the source-follower transistor to the Miller capacitor. Signal flow in the opposite direction is prevented by the source-follower transistor.
Still other prior art approaches are discussed in U.S. Pat. No. 5,485,121 to Huijsing et al. entitled xe2x80x9cAmplifier Arrangement with Multipath Miller Zero Cancellation.xe2x80x9d It is noted in the background of the patent that one such approach is to insert a unilateral element in the Miller capacitor branch to suppress direct feedthrough at high frequencies. More specifically, the unilateral element may be a gate transistor connected in series with the Miller capacitor to serve as a current buffer. That is, the gate of this transistor is connected directly to ground. The patent notes that a disadvantage of this approach is that it introduces an active element and its associated poles in the Miller feedback path. It is further stated that xe2x80x9c[t]hese poles deteriorate the high frequency performance and the remedy is worse than the disease.xe2x80x9dIn particular, this approach results in a large variation in resistance (gDS) with supply voltage variations.
The patent itself discloses a circuit which includes an additional current source coupled to the output of the second gain stage. This additional current source provides a current that is substantially in phase opposition to the bias current of the second gain stage. Of course, this approach requires a separate and dedicated current source, which may increase both power consumption and space requirements.
In view of the foregoing background, it is therefore an object of the invention to provide an operational amplifier which significantly reduces the RHP zero under varying supply voltages, temperatures, and fabrication process parameters.
This and other objects, features, and advantages in accordance with the present invention are provided by an operational amplifier including at least one bias current generator, a first gain stage connected to the at least one bias current generator, and a second gain stage connected to the at least one bias current generator. The second gain stage may be driven by the first gain stage. The operational amplifier may further include at least one capacitive element connected between the first gain stage and the output from the second gain stage. Additionally, a circuit element having a controllable conductance may be connected between the at least one capacitive element and the first gain stage. Also, a control circuit may be included for driving the circuit element so that the conductance thereof substantially matches a transconductance of the second gain stage. Accordingly, occurrences of a right half plane (RHP) zero at the output from the second gain stage is significantly reduced.
More specifically, the circuit element may be a transistor having a first conduction terminal connected to the first gain stage, a second conduction terminal connected to the at least one capacitive element, and a control terminal connected to the control circuit. For example, the transistor may be an N-channel metal oxide semiconductor (NMOS) transistor. The control circuit may include first and second diode-connected transistors connected in series between the at least one bias current generator and a voltage reference. Moreover, the first and second diode-connected transistors may also be NMOS transistors.
Furthermore, the at least one capacitive element may be a transistor having first and second conduction terminals connected together and to the first gain stage and a control terminal connected to the output. Additionally, the operational amplifier may be a complementary metal oxide semiconductor (CMOS) operational amplifier.
A method aspect of the invention is for reducing a right half plane (RHP) zero at an output of an operational amplifier. The amplifier may include first and second signal inputs, at least one bias current generator, a first gain stage connected to the first and second inputs and the at least one bias current generator, and a second gain stage connected to the output and the at least one bias current generator. The second gain stage may be driven by the first gain stage, and at least one capacitive element may be connected between the first gain stage and the output. The method may include connecting a circuit element having a controllable conductance between the at least one capacitive element and the first gain stage. Furthermore, the circuit element may be driven so that the conductance thereof substantially matches a transconductance of the second gain stage to thereby significantly reduce the RHP zero.